Semiconductor structures comprising three-dimensional arrays of chips have emerged as an important packaging approach. A typical three-dimensional electronic structure consists of multiple integrated circuit chips having main planar surfaces adhesively secured together to form a monolithic structure (referred to as a "stack" or "cube"). A metallization pattern is often provided directly on one or more edge surface of the multichip stack for interconnecting the chips and for electrical connection of the stack to external circuitry. This exposed metallization pattern can include both individual electrical connects and bussed electrical connects.
Electrostatic discharge (ESD) is a phenomena know to degrade or destroy discrete electronic components. In particular, given the decreasing size of circuit features with ever improving process technology, static electricity can destroy or substantially harm many of today's integrated circuits. Triboelectric charges are produced anytime two surfaces are separated and if one or more of the surfaces is a nonconductor, then a static electric charge is produced. This is a natural phenomenon and only causes a problem if the static charge is allowed to discharge or induce a charge into the integrated circuit. Such an ESD event can occur very pervasively to a point of several thousand volts. The discharge occurs very rapidly and the usual failure or degradation is caused by the gasification of metal within the device resulting in the gasified metal becoming deposited along a trace of the discharge path.
The damage following each electrostatic discharge event may be instantly catastrophic. Often times, however, the integrated circuit does not totally fail, but rather, remains operable with a latent defect that will ultimately result in premature failure. Such events can also alter the operating characteristics of the integrated circuit, thereby resulting in unsatisfactory and often unpredictable operation. Electrostatic discharge between input/output connects of a semiconductor device chip can occur, for example, from human handling, automated circuit testing or during packaging of discrete integrated circuit chips.